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SOI stands for silicon on insulator. This technology offers the possibility of building electronic devices in a thin layer of silicon that is electrically isolated from the thick semiconductor substrate through the use of a buried insulating layer. In the standard silicon technology the semiconductor substrate is associated with undesirable effects such as high leakage currents, parasitic bipolar components, and, more importantly, interference between individual active devices or circuits built in the same integrated chip. In addition, the use of SOI technology in CMOS (complementary metal oxide semiconductor) circuits may also shrink the dimensions of MOSFET (metal oxide semiconductor field effect transistor) devices and further push the frequency limit of silicon technology. The first confirmation that SOI technology is becoming the state-of the art technology in low-power IC's came in 1999, when IBM launched the first fully functional SOI mainstream microprocessor. The IBM specifications predict a 25-35% improvement over similar bulk CMOS technology, which is equivalent to about two years of progress in bulk CMOS design and fabrication. Besides the fast speed, other benefits of the new SOI chip are reduced power consumption (up to 3 times) and a small soft error rate.

While SOI has already become a mature technology for low power CMOS circuits and justifiably represents the main manufacturing technology for the next generation of ULSI (Ultra Large Scale Integration) low power circuits, it is still an emerging technology for high voltage power integrated circuits. An increased effort is now directed towards developing advanced SOI power device structures for integrated circuits. Compared to bulk junction isolated (JI) devices, SOI devices and circuits offer improved isolation, reduced leakage currents and faster switching speed. Nevertheless, power devices made in SOI technology may suffer from reduced breakdown levels, self-heating effects and latch-up. Several solutions to address these drawbacks partially or totally have been proposed in this paper.

This paper gives an introduction to SOI technology and devices, reviews major steps in developing SOI power devices for integrated circuits, discusses advantages and drawbacks of SOI devices compared to bulk silicon devices and finally reveals the most recent developments in high voltage SOI structures.


Creating defect free films of single crystal silicon on an insulating layer is a technological challenge. Several techniques have been developed to do this, but of these only a few have been commercially successful: silicon-on-sapphire (SOS), separation by implantation of oxygen (SIMOX), bonded and etched back SOI (BESOI) and uni-bond wafers produced by the smart cut process. Each of these in turn are discussed briefly:

Until the 1980's silicon-on-sapphire was the Most mature of all SOI materials. It is produced by growing thin films of single crystal silicon on a sapphire wafer by chemical vapor deposition from silane gas at 1000°C. such films have the advantage of lying on a substrate which is extremely good conductor of heat; also they are highly immune to radiation. However, cost of silicon-on-sapphire material, the relatively poor quality of silicon films, and the emergence of new SOI technologies such as SIMOX and wafer bonding which are based purely on silicon have prevented it from becoming a mainstream SOI technology; its use remains a niche market.

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