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VLSI Project List
Post: #1

Design And Implementation Of ALU
Design And Implementation Of PC Diagnostic Card
Design And Implementation Of Cryptography
Design And Implementation Of AMBA
Design And Implementation Of DTMF Transmitter
Adaptive Filter Implementation
Automatic Baud Rate Generator
Real Time Clock Implementation On CPU Board
Ic Implementation
CAN Implementation

a) Implementation of controller area network (can) protocol.
b) Design of i2c bus interface for parallel to serial data transfer.
c) Implementation of floating point multiplier for ieee “754 bit format.
d) Design and implementation of alu in hdl.
e) High speed ddr- sdram controller with 64-bit data transfer.
f) Redundant radix “ 4 co-processor for high speed arithmetic operations.
g) Implementation of phelix for fast encryption & authentication.
h) Design & implementation of atm knock out switch using concentrator.
i) Sdr “ sdram controller with 64 - bit data transfer.
j) Implementation of jpeg base line image compression.
k) Implementation of 8 “ bit pico processor to perform arithmetic & logical operations.
l) Design of ethernet ip core 802.3 and implementation.
m) Implementation of universal asynchronous receiver transmitter (uart“16550h)series.
n) Implementation of on rail - passenger information system using vhdl.
o) Rtl design & verification of an 8 “ bit micro controller.
p) Implementation of des algorithm for data encryption.
q) A vlsi progressive coding for wavelet based image compression
r) Design of floating point adder for ieee “754 bit format.
s) Design and implementation of 64 point fft / ifft for ieee 802.11a.
t) Design and implementation of floating point unit with ieee “754 bit format.
u) Design of low power fir filter.
v) Design and implementation of reed solomon encoder in hdl.
w) Design and implementation of reed solomon decoder in hdl.
x) Design of 32-bit pci-x bus interface ip core and implementation on fpga board.
y) Design and implementation of rs-232 system controller.
z) Design of 16-bit micro controller.
aa) Design and implementation of atmel avr at90s1200 standard risc micro controller.
bb) Design of time slot interchange digital switch.
cc) Implementation of cyclic redundancy checker for error detection and correction.
dd) Design of 8-bit 2-dimentional discrete cosine transform.
ee) Implementation of fm receiver to demodulate square wave signal modulated in fm.
ff) Design of high speed xmatchpro lossless data compressor.
gg) Design and implementation of memory controller ip core.
hh) Digital design of ds- cdma transmitter using vhdl and fpga
ii) Rtl simulation of qpsk modem

Post: #2
sir i need some information on radix-4 booth multiplier.please sir reply me .i need ur help.
Post: #3
Booth's multiplication algorithm is a multiplication algorithm that multiplies two signed binary numbers in two's complement notation. see more
Post: #4
thank u sir
thanku sir.
Post: #5
sir, plz send me report & ppt on "HIGH SPEED DDR- SDRAM CONTROLLER WITH 64-BIT DATA TRANSFER"
Post: #6

.doc  VLSI IEEE PROJECT TOPICS.doc (Size: 39 KB / Downloads: 54)
• DCT-Based Image Watermarking Using Subsampling-2003
• Shift Invert Coding (SINV) for Low Power VLSI-2004
• Robust DWT-SVD Domain Image Watermarking: Embedding Data in All Frequencies-2004
• Digital Design of DS-CDMA Transmitter Using VHDL and FPGA-2005
• Design of Edge Detection Systems
• A VLSI Architecture for Visible Watermarking in a Secure Still Digital Camera (S2DC) Design (Corrected)-2005
• A Lossless Data Compression and Decompression Algorithm and Its Hardware Architecture-2006
• An FPGA-based Architecture for Real Time Image Feature Extraction-2004
• Image Compression with Different Types of Wavelets-2006

• Design of Low-Cost High-performance Floating-point Fused Multiply-Add with Reduced Power
• Image Edge Detection Based on FPGA
• A High-speed 32-bit Signed/Unsigned Pipelined Multiplier
• A New VLSI Architecture of Parallel Multiplier–Accumulator Based on Radix-2 Modified Booth Algorithm
• FPGA Implementations of the Hummingbird Cryptographic Algorithm
• FPGA Implementation(s) of a Scalable Encryption Algorithm
• A Memory-Efficient and Highly Parallel Architecture for Variable Block Size Integer Motion Estimation in H.264/AVC
• Contrast Enhancement of Color Images using Tunable Sigmoid Function
• Image Compression with Different Types of Wavelets
• Performance Efficient FPGA Implementation of Parallel 2-D MRI Image Filtering Algorithms using Xilinx System Generator
• Design and FPGA Implementation of Modular Multiplication methods using Cellular Automata
• Product Reed-Solomon Codes for Implementing NAND Flash Controller on FPGA chip
• A Pipeline VLSI Architecture for High-Speed Computation of the 1-D Discrete Wavelet Transform
• VLSI Implementation of Fully Pipelined Multiplierless 2D DCT/IDCT Architecture for JPEG
• VLSI Implementation of Autocorrelator and CORDIC algorithm for OFDM based WLAN
• Improvisation of Gabor Filter design using Verilog HDL
Post: #7
Please provide me report on 1k sram design
Post: #8
i am doing now Master of Engineering in Electronis. So i have to do a project. I want to do project in VLSI only . Please tell me about the project.
Thanks And Regards
Ganesh Jadhav
Post: #9
Mam ,
i don't have any projects reports or synopses i don't even have idea about i just wanted to get synopses and have to submit in my collage if they select then i will look for further discussion..
Post: #10
i deceided to do project in vlsi..will u plz send me a current trend vlsi project titles
Post: #11
send me full project of shift invert coding

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